Unmanned Systems Technology 010 | nuTonomy driverless taxi | Embedded computing | HFE International marine powertrain | Space vehicles | Performance monitoring | Commercial UAV Show Asia report

16 Platform one CEVA has developed a fifth-generation vision processing engine for autonomous systems that is optimised for neural networks (writes Nick Flaherty). The CEVA-XM6 gives eight times the performance of the previous XM4, which is used in a wide range of vision processing chips (see Embedded computing focus, page 32). It also boosts the performance of all vision processing kernels by a factor of three. The digital signal processing (DSP) core has added new instructions, a new vector processor and scalar unit as well as boosting the memory bandwidth and direct memory access. Alongside the DSP core, the platform includes function-specific accelerators for Convolutional Neural Networks (CNN) and image de-warp (for all types of image transformations), CEVA’s CDNN2 neural network software framework, OpenCV, OpenCL and OpenVX APIs, CEVA-CV computer vision library and a set of optimised, widely used algorithms. The platform comes with active safety compliance and safety package deliverables for the ISO 26262 standard so that chips using the engine can be easily integrated into the development process of automated driving applications. The design of the vector processor unit allows use of the computing resources at over 95%. An enhanced parallel scatter-gather memory load mechanism improves the performance of vision algorithms used in autonomous systems such as SLAM and depth mapping. Other improvements include an enhanced 3D data processing scheme for accelerated CNN performance, a 50% improvement in control code performance over the XM4 and a new scalar unit that further reduces code size. For wide-angle camera applications such as 360 º cameras, the image de- warp accelerator supports the ARM Frame Buffer Compression protocol, for optimum system interoperability. CEVA sees this as a key advantage over architectures using graphics processor units to run neural networks. Benchmarks give 25 times the performance for the same power consumption (operations/Watt) when running networks generated by CNN architectures such as Alexnet and GoogleNet. The previous XM4 and MM3101 processors have been used in 25 different chip designs to date. The XM6 components will be available for lead chip developers in the fourth quarter of 2016 and for general licencing in the first quarter of 2017. This will lead to vision processing chips coming on the market towards the end of 2017. Neural network vision engine Vision processing October/November 2016 | Unmanned Systems Technology The CEVA-XM6 core is optimised for vision processing with neural networks in autonomous systems Active safety compliance and safety package deliverables allow chips using the engine to be easily integrated into development