Unmanned Systems Technology 038 l Skyeton Raybird-3 l Data storage l Sea-Kit X-Class USV l USVs insight l Spectronik PEM fuel cells l Blue White Robotics UVIO l Antennas l AUVSI Xponential Virtual 2021 report

35 happened, and that requires low latency to write event recordings – there are some points during such an event that are very important, and these are likely to be just before a crash with a loss of power. For a centralised system the challenge is to achieve very low latency with shared memories, and that requires a complex fail-safe design for the power system. This risk of a power failure also means the storage architecture cannot work with particular memory technologies such as DRAM, or dynamic memory, as there is the risk of large amounts of data loss. If there is local DRAM there’s probably no chance to transfer the data from the DRAM to the SSD or the storage media, so there has to be a fail-safe or write- through mechanism. In this way the storage architecture decisions influence the choice of memory technology. Memory technologies There are several technological stages for the key components in a data storage system, from the basic memory chips to the controllers and the drives, and then the interfaces and higher-level controllers. The fundamental element is the memory itself, and there are several different types. DRAM needs to be refreshed many times a second, and if the power fails it loses all its data. This is the most common memory for running large amounts of software code in a system. Each DRAM cell consists of a transistor and a capacitor to hold the charge that determines whether it is storing a ‘1’ or a ‘0’. The largest DRAM device currently in production can hold 16 Gbits of data. By contrast, static RAM (SRAM) uses six transistors as a logic flip-flop to store data for longer than a DRAM – a few seconds. As it does not use a capacitor it can be integrated into a chip, so it’s used for the on-chip memory such as a cache for a processor. The largest SRAM chip in production is currently 16 Mbits, and some have been radiation-hardened and qualified for use in space. SRAM also tends to be used as the buffer for longer-term storage. In a PC, the longer-term storage has traditionally been a hard disc drive, storing data on platters of magnetic material. These currently record up to 32 Tbits (4 Tbytes) of data but can be power-hungry and unreliable when used in harsh environments. The demand for more reliable, lower- power storage has driven the development of flash memory, a type of non-volatile electronically erasable programmable read-only memory (EEPROM). This uses a floating-gate transistor to store a bit, usually for a few years without power. This has evolved into the dominant non-volatile memory technology, called NAND flash. The advantage of NAND flash is that it can store data not just as a ‘1’ or ‘0’ but at a particular voltage level. This creates a multi-level cell, or MLC, and increases the density of data that can be stored, as each level can be a ‘00’, ‘01’, ‘10’ or a ‘11’, meaning two bits can be stored. Up to four bits are now being stored in a quad-level cell, giving four times the density for a given size of memory chip, but the reliability of data storage is lower. While this is fine for consumer SD cards or storage in a mobile phone, the reliability of an MLC NAND flash memory also decreases with temperature. High- reliability systems tend to use drives with single-layer cells (SLCs), resulting in much lower storage capacity. NAND chips are built with multiple layers, giving more storage. The largest- capacity NAND MLC chip currently has 176 layers stacked on top of each other, storing up to 512 Gbits by using a triple- level cell, and a 1 Tbit chip is planned by putting two of these together. However, most NAND chips tend to have around 96 layers as a single die with 64 Gbits of storage. The dies can be combined in a package with or without a controller. A memory cell in an NAND flash device takes from hundreds of microseconds to a few milliseconds Data storage | Focus The risk of a power failure means the storage architecture can’t work with memory technologies such as DRAM, as a lot of data may be lost Unmanned Systems Technology | June/July 2021 Different memory technologies suit different unmanned applications (Courtesy of SwissBit)