46 Besides the need for large capacity, these huge blocks of data will need to be moved continually between the host processor and flash device. The interface bandwidth between them can act as a bottleneck or enabler of efficient transfer. With a maximum capacity of 256 GB and a maximum data rate of 400 Mbit/s, traditional, eMMC-based media is highly limited in its applicability. Instead, the UFS standard offers storage capacities of up to 1 TB. The standardisation bodies (JEDEC and MIPI) have been evolving the data rates and capabilities of the UFS standard over the last decade. The current UFS 3.0 devices can go up to 2.9 Gbit/s with two lanes. Given that the interface is bidirectional, this provides six times the speed possible over eMMC. This data rate exceeds that of 5 G transfers (2.5 Gbit/s), allowing for a smaller internal memory inside the host processor when data is being transferred between the flash device and external systems beyond the host processor. It isn’t just the interface speed, but also the flash write speeds that are evolving. JEDEC enhanced write performance by introducing the write-booster feature in UFS 3.1, which adds a small pseudo SLC cache in the flash devices for easy, repeated access. In terms of noise management, UFS improves on eMMC. Unlike eMMC, which is single-ended, the UFS interface is differential, making the system more resilient to transmission errors and noise, implying lesser probability of incorrect data interpretation and/or need for retransmission. The differential signalling also improves EMI performance, making it easier to pass automotive EMC standard CISPR 25 at system level. Automotive storage is at a far higher risk of damage than consumer-grade variants. UFS lowers the overall risk of wear and tear of the storage device by allowing it to notify the host about large temperature variations. When the storage device indicates an alarming temperature, the host can throttle down or take action to cool it. Low power operation is a mandatory requirement for electronics to reduce the carbon footprint and extend the battery lifecycle. UFS achieves this through differential signalling and an ability to switch to deep sleep mode. UFS 4.0 UFS adoption began with smartphones but has spread to automotive applications. The mainstream for Level 3 vehicles has been storage that complies with UFS 3.1, but many automotive manufacturers are considering adopting UFS 4.0 in preparation for future vehicles that will require high-speed data transfers. The UFS serial interface makes use of the MIPI Alliance’s M-PHY standard for its physical layer, and the UniPro protocol for its M-PHY interface. The latest UFS 4.0 devices achieve speeds of up to 4000 Mbit/s and 2000 Mbit/s for reading and writing, respectively. Read performance is about twice that of the previous generation UFS 3.1 devices. This comes from the increased performance of the flash memory itself and its controller technology, which is in the same package. The controller plays a crucial role in realising optimum flash-memory performance, and enabling storage products that come close to the maximum figures defined under UFS and other standards. The controller is responsible for the fine-grained control and management of flash memory, and it is one of the most important determinants of storage performance. Developing a controller Comparison of e-MMC and UFS. The use of a serial interface in UFS leads to higher data-transfer speeds (Image courtesy of KIOXIA) Memory requirements in autonomous vehicles ( Image courtesy of Kioxia) June/July 2024 | Uncrewed Systems Technology
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